1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device and, for example, to a semiconductor device including a contact plug penetrating through a substrate and a method for manufacturing the semiconductor device.
2. Background Art
In recent years, there has been an increasingly exacting demand for a reduction in the size of components themselves and in the number thereof. This demand is directed toward components for use mainly in mobile devices, such as a cellular phone, in order to downsize the device as a whole. Accordingly, a semiconductor chip is required to be miniaturized or a multitude of semiconductor chips are required to be mounted in a single component. More specifically, a semiconductor element is required to be miniaturized in every generation (every two to three years) by as much as 70% from the size of thereof one generation earlier. In addition, there is the requirement that different types of semiconductor chips, including a DRAM, an SRAM, a logic element and an analog element, be mounted in a stacked manner.
Examples of a method for mounting a plurality of semiconductor chips in a stacked manner include SiP (System in Package) and MCL (Multi-Chip-LSI). Such an SiP device and an MCL device as mentioned above are generally manufactured in the following manner. First, an interconnect composed of one or a plurality of layers is formed on a semiconductor element, such as a MOS transistor, formed on an Si substrate. After this, there is formed a pad for an electrode to be electrically connected to part of the interconnect. Next, a bump electrode is formed on this pad using a metal such as gold (Au), copper (Cu) or tin (Sn). Next, this bump electrode is connected to an external electrode with a bonding wire, or a plurality of semiconductor chips are stacked by directly bonding the bump electrodes thereof to one another, and then mounted in a package.
When mounting semiconductor chips in a package by leading out the interconnects thereof using bonding wires as in the case of the SiP, it is possible to mount three or more semiconductor chips. However, the size of a semiconductor device after mounting increases by as much as at least the length of a bonding wire with respect to the size of a semiconductor chip.
When bonding bump electrodes formed on a surface of each semiconductor chip to one another with two semiconductor chips facing each other as in the case of the MCL, it is possible to stack the two semiconductor chips without using bonding wires. However, it is difficult to stack three or more semiconductor chips.
Hence, International Patent Laid-Open No. 2005-022631, for example, proposes means for stacking three or more semiconductor chips without using bonding wires. That is, there is formed a contact plug penetrating through the front and rear surfaces of an Si substrate (hereinafter referred to as a through-substrate contact plug). Then, electrode pads on the front and rear surface sides of the Si substrate are formed respectively, so as to conduct electricity through this through-substrate contact plug. In addition, the international publication proposes a method for electrically connecting the electrode pads formed on the front and rear surface sides of the Si substrate by way of the through-substrate contact plug.
Accordingly, along with an advance in the miniaturization and speeding-up of a semiconductor circuit, there has been the requirement that a low-dielectric constant insulating film (hereinafter referred to as a low-k film) be used as an insulating film for an interconnect layer, in order to reduce parasitic capacitance between interconnects. In fact, this requirement has led to the manufacture of a product, in which a low-k film is used in an interconnect layer, as the most-advanced logic device product.